Preliminary Program

9:00-10:00 Keynote
Xipeng Shen: Tackling Memory and Concurrency Barriers for Modern Parallel Computing
Two key barriers for tapping into the full power of modern (massively) parallel machines are the limited bandwidth in memory and the limited parallelism in some applications. This talk presents two recent advancements in tackling the barriers. The first advancement is a software framework named PORPLE, which for the first time enables portable on-the-fly enhancement of data placement on GPU memory. It makes it possible for applications to fully capitalize the sophisticated memory systems of modern GPU. The second advancement is principled speculation, a rigorous approach to parallelizing a class of "embarrassingly sequential" programs built upon Finite State Machines (FSM). The two techniques both lead to significant speedups of applications, illustrating the promise of software optimizations for bridging the gap between applications and contemporary computing systems.
10:00-10:30 Break
10:30-12:00 Session I
Dependence-Based Code Transformation for Coarse-Grained Parallelism
Bo Zhao, Zhen Li, Ali Jannesari, Felix Wolf and Weiguo Wui (German Research School for Simulation Sciences / RWTH Aachen University / Xi'an Jiaotong University)
Hardware-Aware Automatic Code-Transformation to Support Compilers in Exploiting the Multi-Level Parallel Potential of Modern CPUs
Dustin Feld, Thomas Soddemann, Sven Mallach and Michael Juenger (Fraunhofer SCAI / Universitaet zu Koeln)
The Basic Building Blocks of Parallel Tasks
Rohit Atre, Ali Jannesari and Felix Wolf(German Research School for Simulation Sciences GmbH)
12:00-14:00 Lunch
14:00-15:30 Session II
Runtime Support for Multiple Offload-Based Programming Models on Embedded Manycore
Alessandro Capotondi, Germain Haugou, Andrea Marongiu and Luca Benini (University of Bologna / ETH Zurich / STMicroelectronics)
Exploiting Dynamic Parallelism to Efficiently Support Irregular Nested Loops on GPUs
Da Li, Hancheng Wu and Michela Becchi (University of Missouri)
An Evaluation of Memory Sharing Performance for Heterogeneous Embedded SoCs with Many-Core Accelerators
Pirmin Vogel, Andrea Marongiu and Luca Benini (University of Bologna / ETH Zurich)
15:30-15:50 Break
15:50-16:50 Session III
A Roadmap for a Type Architecture Based Parallel Programming Language
Muhammad Nur Yanhaona and Andrew Grimshaw (University of Virginia)
Cycle-based Model to Evaluate Consistency Protocols within a Multi-protocol Compilation Toolchain
Hamza Chaker, Safae Dahmani, Loïc Cudennec, Guy Gogniat, and Martha Johanna Sepulveda (University of Bretagne Sud / CEA, LIST / Ecole Centrale de Lyon)
16:50 Closing